The Parallel Simulation Test in Distributed Multiprocessors
Haisheng Huang · Journal of Shanghai University of Electric Power · 2012
In the distributed memory multicomputer,FSIN and TRGE are used to simulate the full-system.By using the congestion control of LBR and IPR,the passing packet is authorized to the priority,which reduces the network congestion.All the simulators have different simulation clock.In order to coordinate the computing model and IN model,the synchronization is used to coordinate the models.But the synchronization mechanisms are limited by the slice,which causes the message passing delay.So emphasis of simulator is to find out the duration of slice,which gives rise to a reasonable value of the simulation speed and accuracy.