High speed multiplier algorithm based on four-tree structure
GE Hai-tong · Jisuanji yingyong yanjiu · 2010
This paper used an auto-synthesizing optimized arithmetic for speed up multiplier velocity. It used four-tree recursive method to reduce critical path,instead of traditional part product carry-in chain to generate high part of long-latency multiplier. Then it reduced hardware cost by branch breaking and combing to implement logic share between tree structures. Also it supported auto-synthesize within different area constraints. This new multiplier gets 10% faster than the one based on Booth arithmetic and Wallace tree.