An Optimal Design for Sklansky Parallel Prefix Adder
Wang Da-yu · Microelectronics & Computer · 2013
Sklansky structure is known as a typical scheme in parallel prefix adders.But the increase of delay caused by its big fanout restricts its implementation.In this paper,an optimization for this problem is proposed that same carry operators are added to ensure a maximum of two fanouts.The synthesis on Synopsys Design Compiler reveals that at least 14.5% delay reduction is achieved at the expense of minimum area increase.