Decoding DEC RS code on FPGA
Shu-E Zhang · Journal of North China Electric Power University · 2004
The hardware decoding has been implemented using modified step-by-step algorithms. In its encoding algorithm, the generator polynomial is made self-reciprocal and the encoder is much simple and so is the decoder. They can be implemented easily with FPGA. It is proved that 2 or fewer symbol errors random or bursts of errors) ( can be corrected successfully by RS 15,11). (