Implementation of timing and carrier-phase recovery in all-digital receivers based on DSP Builder
Chen Shu · Journal of the Graduate School of the Chinese Academy of Sciences · 2008
In this paper,the design and implementation of the synchronization algorithms in all-digital communication receivers are introduced.The fixed-point timing recovery algorithm based on the Gardner feedback loop approach and the carrier recovery algorithm using digital Costas loop are realized via Altera DSP Builder.Both the computer simulation and the FPGA realization demonstrate the validity of the algorithms.Results show that the realized system has good performance with the SNR degradation less than 1.5dB,the acquisition ranges of timing recovery and carrier recovery larger than ±1% and ±4%,respectively.