SDRAM Controller with Time-hiding Feature for Data Block Access
Maojun Zhang · Jisuanji gongcheng · 2009
In order to speed up the efficiency of SDRAM controller while reading/writing data blocks,this paper proposes a time-hiding method for the design of SDRAM controller.It implements this method on FPGA.Experiments indicate that this time-hiding method shortens the latency and increases the speed of accessing data blocks.For example,when writing 4×4 data blocks,this method saves access time by 52%,and when reading 8×8 data blocks,this method saves access time by 44%.