Implementation and Evaluating of a 2D Lagrange-Euler Method on MASA Stream Processor
Wu Wei · Journal of National University of Defense Technology · 2006
Modern semiconductor technology allows us to place hundreds of functional units on a single chip which provides limited global onchip and off-chip bandwidths.General purpose processor architectures have not adapted to this change in the capabilities and constraints of the underlying technology,still relying on global on-chip structures for operating a small number of functional units.Stream processors,on the other hand,have a large number of functional units,and utilize multiple register hierarchies with high local bandwidth to match the bandwidth demands of the functional units with the limited available off-chip bandwidth.This paper describes the microarchitecture of MASA and presents the implementation of the application in fluid dynamics.We developed cycle-accurate simulator to evaluate the performance.The results show that the application on 500MHz MASA outperforms a 1.6G Itanium2 by a factor of 4. This research confirms that stream architecture has the potential to deliver high performance.