Implementation of Time-Domain Reed-Solomon Decoder Using FPGA
Lijun Zhang · Journal of Nanjing Institute of Posts and Telecommunications · 2001
Based on Blahut's time-domain decoding algorithm,a time-domain Reed-Solomon decoder is presented in this paper.Its implementation using FPGA is discussed in detail.The authors analysed the performance of a time-domain RS(63,47) decoder implemented using FPGA as an illustrating example.The decoder can accept input data rate up to 6 Mbit/s,occupying less than half of the FPGA resource that a corresponding fequency domain decoder occupies.