Automatically Extracting Sequential Information of Integrate Circuits Based on RTL
Li Shen · Microelectronics & Computer · 2003
Static sequential depth and dynamic sequential depth of register transfer level are introduced,based on integrate cir-cuits descripted in Verilog hardware description language(HDL).Executive effects of sentences and sequential relation of program are measured by static and dynamic methods,which can be extracted automatically.Thus,it is convenient for high-level automatic test generation,design and verification.