Design and Implementation of a High-speed FFT Processor for Power Harmonic Detector in FPGA
Huang Zhong-meng · Electric Switchgear · 2012
In this paper,the design of a FPGA(field programmable gate array) implemented high-speed FFT processor is presented to realize the output of real-time spectrum data of the power signals in harmonic testing and analysis.The processor is base on radix-4 algorithm extracting in time and the choice of the CORDIC algorithm for realizing the basic butterfly operation instead of complex multiplication for the FFT which saves a lot of hardware.A dual-port memory structure are used to realize the in-place data accesses.The implemented unit operated in pipelining improving the system speed.The overall modular design based on VHDL has been validated in signal simulation test.When the system is working frequency 100MHz,the proposed FFT operations of 1024 input sequences for 16 points plural need only 51.3 us.The simulation results show that the proposed processor meets the requirements of high-speed and real-time processing in power harmonic signal analysis system.