Design And Implementation Of Double Precision Floating Point Multiplier Using VHDL

Sadiya Fatima Sufi, Pooja Thakre · 2015

1. ABSTRACT paper give the brief description of double precision floating point multiplier. We present a comparative study of double precision floating point multiplier. Floating point number system is a common device for many scientific computations due to its wide range feature.

Read the paper · More papers on PaperTik