Design of Extended Register File for Multi-core Processor
YU Zhi-yi · Jisuanji gongcheng · 2012
Concerning the issue of limited number of register files in processor,this paper presents an extended register file design scheme for multi-core processors.A multi-bank architecture is employed for hardware design,and the communication ports are mapped in the address space of extended register file,which enables an inter-core communication method with register file direct addressing.A hybrid software configuring method is proposed with both bottom-layer instructions and top-layer packaged functions,and the compiling flow is improved.Estimation result shows this scheme can both double the number of available register files and reduce the number of instructions for inter-core communication by 50%.And the system throughput is optimized.