Designing Modulo $({2^n}-1)$ Parallel Multipliers and its Technological Application Using Op Amp Circuits
Hun-Giu Lee, Chul Kim · Journal of the Institute of Electronics Engineers of Korea · 2001
In this paper, we introduce modulo ( 2-1) parallel-processing residue multipliers, using Op Amp circuits, and their technological application to designing binary multipliers. The limit of multiplying speed in computational processing is a serious harrier in the advances of VLSI technology. To solve this problem, we implement a class of modulo ( 2-1) parallel multipliers having superior time complexity to O( log( log( log))) by applying Op Amp circuits, while investigating their technological application to binary multipliers. Since they have excellent time & area complexity compared with previous parallel multipliers, and are applicable to designing binary multipliers of the same efficiency, such parallel multipliers possess high academic value. Indexing Terms Modular Multipliers. Binary Multipliers. Parallel Processing, Operational Amplifiers, Mersenne Numbers.