Chaotic Digital Image Encryption and Its Hardware Implementation based on FPGA Technology
Wujie Zhou · Communications technology · 2008
A novel method for realizing chaotic digital image encryption and its hardware implementation based on FPGA is presented.According to discrete and digital process technology,three-dimensional Lorenz chaotic system is discretized and Lorenz chaotic iteration sequence is generated by using Hardware Description Language (VHDL)and FPGA technology.Red,green,and blue tricolor signals of image are encrypted and decrypted,respectively.On the basis of FPGA exploitation platform with EP2C35F672C6 chip,taking gray image with 640×480 BMP format as an example,the digital image encrypted and decrypted algorithm using Lorenz chaotic sequence is designed,and FPGA hardware implementation result is also given.