Reliability Design for Intelligent Wireless Alarming Receiving Host Computer
Fan Yang · Ordnance Industry Automation · 2007
The intelligence wireless alarming receiving host computer uses the self-deflection voltage circuit to improve and demodulate amplifying wave.Use AT89C51 single MPU as the main control core of wireless alarming receiving host computer.Its integrated circuit encoder,external components and address code line on-off construct the decoding for demodulation signal.The system MCU adopts intermit mode for calling of alarming features.Inquire VT signal repeatedly in intermit service program.Then,acquire corresponding four-digit data of decoder and the program evaluates the data stability in given circle.Then,store the acquired alarming data and output the high voltage to trigger the sound and light alarming circuit through line P1.6.