Design of a Dynamic Compensation and High Stability LDO
Rongfei Zhao · 2011
In this paper,a dynamic compensation,high accuracy LDO regulator is designed and implemented.At first,considering the characteristic that the loop stability changes with load current,a modified dynamic compensation circuit is proposed.The compensation circuit forms a dynamic zero which can track the LDO's output pole as the load current changes,so that the stability of the control loop is almost independent of load current.Based on CSMC 0.5 μm CMOS process,this work completes circuit design,physical layout,tape-out and chip test.The chip area is 400 μm×650 μm.The results show that the proposed LDO has the following characteristics: the operating voltage is 3.5～6.5 V,the output voltage is 3.3 V,the dropout voltage is 200 mV when it provides 100 mA load current,the maximum overshoot of output voltage is about 100 mV,the line regulation rate is 0.003%/V,the load regulation rate is 0.005%/A,the power supply ripple rejection is 80 dB at low-frequency and is 50 dB at 1 kHz,the total quiescent current is about 34 μA.These results show that the LDO basically meet the target of this design.