Design of 10Gb/s Reed-Solomon(255,239) Decoder
Jun Zhang · Microelectronics & Computer · 2005
This paper presents the design and implementation of a 10Gb/s Reed-Solomon (255, 239) decoder. The re-source sharing of the key-equation-solving block is employed in the data solving of four channels based on the opti-mization of the operation flow to reduce the hardware complexity and chip area. Uncorrectable code blocks are also managed. The decoder is synthesized by Synopsys Design Compiler and realized by TSMC 0.18μm CMOS process. The design can achieve the required function of 10Gb/s RS decoding, and the hardware complexity is widely reduced.