Optimization Design Method and FPGA Implementations of Wide-bandwidth Fractional Delay Filter
Xu Yuan · Modern Radar · 2012
An optimization design method of wide-bandwidth fractional delay filter(FDF) is proposed in this paper.A two times oversampled input signal is produced,halfband limited and then passed through a variable FDF,which is designed using the farrow structure.The resulting signal is then decimated by two in order to revert to the original sampling frequency.A polyphase structure provides an efficient implementation of the filter.Using the parallel distributed arithmetic based on FPGA,two methods then,one of which is device dependent while the other is device independent,are designed to implement the FDF.The maximum operating frequencies of 184 MHz and 119 MHz have been achieved for the two methods when they are implemented in Altera Stratix FPGA.