Design and Implementation of Front-End of DDS Based on ASIC Flow
Tao Zhang · 2009
System architecture of a direct digital synthesizer(DDS) was constructed based on ASIC design flow.Module partitioning and algorithm analysis were described.Functional simulation at RTL level was performed and test-bench was written using Verilog HDL.All digital portions in the module were designed and simulated,and synthesis optimization and timing analysis were also performed.To meet the requirement of high frequency and low jitter,repeated synthesis was necessary,in which speed and area should be taken into consideration.Finally,digital modulation with DDS was functionally simulated and tested.