Implementation of wideband digital channelized receiver on FPGA
Wei Yue · Electronic Design Engineering · 2011
To meet requirements of the modern electronic warfare on the wide receiver processing bandwidth,high sensitivity and real-time processing,a digital channelized receiver design was proposed.Based on the derivation of efficient channel receiver model,polyphase filter structure wa adopted to realize digital channelized receiver.The high-speed A/D was used for data acquisition,and high-performance FPGA exceeded the channel real-time processing such as data extraction,polyphase filter,and CORDIC algorithms.In order to improve real-time,parallel IFFT was implemented.The receiver not only could steadily output the frequency and phase information,but also could deal with three different ways signals which arrived at the same time.The actual performance results show that the receiver has correct function and hits the intended target.