Improving the MELP Coding Algorithm Using a Configurable and Extensible Processor

Shuangyan Chen · Microelectronics & Computer · 2006

An enhanced design and implementation of the 2.4 Kbps military standard MELP coding algorithm based on the Tensilica's configurable and extensible processor Xtensa is discussed in this paper. Using Tensilica Instruction Extension (TIE) language and integrated with the base processor core, designers can add user-defined instructions in order to meet special application requirements. It is clear to see that the number of total cycles the algorithm needed has been reduced by 53 percent.

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