Multiple soft fault diagnosis of DC analog CMOS circuits designed in nanometer technology
Michał Tadeusiewicz, Stanisław Hałgas · Analog Integrated Circuits and Signal Processing · 2016
This paper is devoted to local multiple soft fault diagnosis of nonlinear DC analog CMOS circuits designed in nanometer technology. An algorithm is developed that allows estimating the values of a set of potentially faulty process parameters. It exploits two tests with the input nodes accessible for excitation and the output node accessible for measurement. One of the tests is used to find the parameter values. It leads to a system of nonlinear algebraic type equations that are not given in explicit analytical form and may be satisfied by several sets of the parameter values. To solve the system of the equations the Nelder–Mead optimization method is applied with the objective function properly modified during the computation process. Next the obtained solution, being a set of the parameter values, is validated using the other test. If the solution passes this test it is considered as the actual one. Otherwise, another solution is calculated and verified using the same approach. The developed diagnostic procedure has been implemented in DELPHI, whereas the required by the algorithm circuit analyses are performed using IsSPICE 4 and both environments have been joined together. For illustration three numerical examples are given.