Efficient Mapping and Allocation of Execution Units to Task Graphs using an Evolutionary Framework
Ahmed Al-Wattar, Shawki M. Areibi, Gary Gréwal · ACM SIGARCH Computer Architecture News · 2016
Partial dynamic reconfiguration of FPGAs gives designers the capability to change certain parts of the hardware while other parts remain active and in use. This provides several benefits including reducing device count and power consumption. However, this also introduces new challenges that need to be addressed by designers. This paper introduces a framework for efficient mapping of execution units to task graphs in a runtime reconfigurable system. The framework utilizes an Island Based Genetic Algorithm flow that optimizes several objectives including delay and power consumption. The GA based technique not only optimizes the above objectives, but also aggregates the Pareto front of the different islands to further enhance solution quality. The Island based GA runs each GA in parallel, and is amenable to both software and hardware implementation. The proposed Island based GA framework achieves on average 55.2% improvement over a single GA implementation and 80.7% improvement over a baseline random allocation and binding approach.