Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces
Hyeonuk Sim, Atul Rahman, Jongeun Lee · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2016
Most existing solutions to pipelining nested loops are developed for general purpose processors, and may not work efficiently for field-programmable gate arrays due to loop control overhead. This is especially true when the nested loops have nonrectangular iteration spaces (IS). Thus we propose a novel method that can transform triangular IS-the most frequently found type of nonrectangular IS-into rectangular ones, so that other loop transformations can be effectively applied and the overall performance of nested loops can be maximized. Our evaluation results using the state-of-the-art Vivado high-level synthesis tool demonstrate that our technique can improve the performance of nested loops with nonrectangular IS significantly.