VHDL Modelling of a Fuzzy Co-processor Architecture
Radoslav Raychev, Abdellatif Mtibaa, Mohamed Abid · 2005
Abstract - The main benefit of hardware fuzzy processors over software implementations is their higher performance. This advantage is greatly appreciated in real-time and embedded applications. The paper presents a VHDL modelling approach for synthesis of a possible architecture for fuzzy co-processors. The target structural design is predefined for fuzzy calculus acceleration. An ordinary external RAM has to be attached to the fuzzy co-processor and to the host as a dedicated fuzzy inference rules and fuzzy database medium. So, the overall system architecture is quite simple and cost saving. This architecture has been implemented on a FPGA design platform XC4005. It makes confident the using of the fuzzy co-processor in real time and/or embedded applications. Keywords: fuzzy co-processor, ar chitecture, VHDL, FPGA I. INTRODUCTION Fuzzy co-processor (FzCoP) hardware implementations are a preferred option in embedded control systems [7]. Figure 1 presents data flow graph in a fuzzy-controlled system. Figure 1. Data flow for embedded fuzzy co-processor