FPGA based implementation of content-addressed memory based on using direct sigma-delta bitstream processing
Alexey M. Romanov, Mikhail P. Romanov · 2016
The article introduces a novel architecture for content-addressed memory implementation on FPGA. An opportunity of significant memory size reduction by using linear interpolation implemented with direct sigma-delta bitstream processing is demonstrated. The influence of introduced architecture parameters on approximation accuracy of nonlinearity stored in content-addressed memory and amount of resources required for its FPGA implementation are analyzed.