Behavioral Design and Synthesis of 64 BIT ALU using Xilinx ISE

Asst. Professor, CIT, Kokrajhar) (Asst. Professor, CIT, Kokrajhar, Rajib Chetia · IOSR Journal of Electronics and Communication Engineering · 2013

This paper presents the behavioral Design and synthesis of a 64 bit ALU.64 bit ALU is basically a multiplexer that operates mainly 16 operations as per select line Bit-permutation.Flags are other important indicators used for specific purpose e.g. if Sign Flag is HIGH then the output of ALU must be a negative number.CLR can reset the output of ALU.

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