Parallelization and Performance Optimization of Bombardier Multiblock Structured Navier-Stokes Solver on IBM Eserver Cluster 1600
Kurt Sermeus, Éric Laurendeau, F. A. Parpia · 45th AIAA Aerospace Sciences Meeting and Exhibit · 2007
This paper describes the migration of an industrial multiblock structured grid NavierStokes solver from a vector shared-memory symmetric multiprocessor (SMP) to a cluster of cache-based general-purpose microprocessor SMP nodes. Aiming at achieving high performance on this new type of computer architecture, the paper discusses developments towards three software design requirements. First, for high single-processor performance, the most time-consuming routines were adapted to make efficient use of a hierarchical memory subsystem. Second, an efficient and scalable distributed-memory parallelization strategy was developed. Third, a block-splitting algorithm was developed to ensure a tight workload balance for the parallel computation with a large number of processors on typical multiblock grids.