An Optimized Logarithmic Converter With Equal Distribution of Relative Errors

Mengyao Zhu, Yajun Ha, Chengcun Gu, Liuchuang Gao · IEEE Transactions on Circuits & Systems II Express Briefs · 2016

State-of-the-art piecewise logarithmic converters employ nonuniform segments to reduce the variance of relative errors, particularly for small inputs. However, it is difficult to have an optimized algorithm to accurately choose the nonuniform segments for a required approximation error. In this brief, we present a relative error equal distribution (REED) algorithm that performs the nonuniform piecewise linear interpolation of logarithm. It is able to precisely set the nonuniform piecewise points so that the relative error of each segment is within an upper bound, and finally produce a flat relative error distribution. It can be applied to any number of segments, even if the number is not the power of 2. Experimental results show that our REED algorithm achieves over 70% reduction of average relative errors for the benchmark graphics application, compared to both the state-of-the-art uniform and nonuniform methods. Synthesis results show that our hardware resources are comparable to that of the state-of-the-art nonuniform methods.

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