Vlsi Implementation of Low Power Convolutional Coding With Viterbi Decoding Using Fsm
S Gnanamurugan · IOSR Journal of Electrical and Electronics Engineering · 2013
Convolution Encoding with Viterbi Decoding is a powerful method for Forward Error correction and Detection.It has been deployed in many Wireless Communication Systems to improve the limited capacity of the Communication channels.Forward Error Correction techniques that is particularly suited to a channel in which the transmitted signal is corrupted mainly by Additive White Gaussian Noise.Convolution codes which are designed with state diagram method,Viterbi Decoder includes Branch Metric Unit, Add -Compare Select unit, Survivor-Path Memory involving choices of area and power.VLSI process technologies make it possible to realize one chip high speed encoder and decoders.Fixed set of parameters o f 1/2 code rate with a constraint length of 3, encoder polynomials and trace back depth is comp lex.This complexity is reduced by different techniques with respect to reduction in area size increase the speed and low power consumption.