A New Improved MCML Logic for DPA Resistant Circuits
Tripathy A.K, A. Prathiba, V. S. Kanchana Bhaaskaran · International Journal of VLSI Design & Communication Systems · 2013
Security of electronic data remains the major concern.The art of encryption to secure the data can be achieved in various levels of abstraction.The choice of the logic style in implementing the security algorithms has greater significance, and it can enhance the ability of providing better resistance to side channel attacks.The static CMOS logic style is proved to be prone to side channel power attacks.The exploration of CMOS current mode logic style for resistance against these side channel attacks is discussed in this paper.Various characteristics of the current mode logic styles, which make it suitable for making DPA resistant circuits are explored.A new methodology of biasing the sleep transistors of (MOS current mode logic) MCML families is proposed.It uses pass gate transistors for power-gating the circuits.The power variations of the proposed circuits are compared against the standard CMOS counterparts.Logic gates such as XOR, NAND and AND gate structures of MCML families and static CMOS are designed and compared for the ability of side channel resistance.A distributed arrangement of sleep transistors for reducing the static power dissipation in the logic gates is also proposed, designed and analyzed.All the logic gates in MCML and CMOS were implemented using standard 180 nm CMOS technology employing Cadence® EDA tools.