FPGA Hardware Acceleration for Visualization with Use of the Ray Tracing Algorithm
Liberios Vokorokos, Branislav Madoš, Viktor RUSKA · Acta Electrotechnica et Informatica · 2014
This paper deals with the issue of hardware acceleration of photorealistic visualization with use of ray tracing technique in real time.First part of the article briefly introduces ray tracing and presents existing hardware architectures that are accelerating computations with aim to bring real time ray tracing; second part of the article introduces the implementation of the designed solution that represents two modules implemented with use of the VHDL language and the FPGA technology.Modules are accelerating the part of ray tracing algorithm that according to the research requires the most system resources.This part consists of computation needed to find the ray-object intersection.The first module computes ray -sphere intersection, and the second computes ray -triangle intersection.Both modules are composed of number of components, which were optimized and parallel computing was applied in highest possible measure.