On-chip Networks!
Satwant Kaur · IETE Technical Review · 2013
AbstractMore and more applications are hungry for more and more computation power and performance. This need plus the technology advancements in the field of electronics are resulting in more and more cores and processors being put on the smaller and smaller System-on-Chip (SoC). In spite of such growth in SoC, due to limitations of current On-chip interconnections solution, the power of SoC remains un-utilized. In this column “Pushing Frontiers with the First Lady of Emerging Technologies”, Dr. Satwant Kaur explains how her vision of Networks-on-Chip (NoC) also known as On-chip Networks will fulfill the potential and promise of On-chip systems. She discusses some key emerging technologies used for NoC in areas of topologies, switching, congestion, deadlock recovery, 3D SoC, flow control, and interference control to bring about improvements in data quality, communication, performance, connectivity, power consumption, and scalability of today’s SoC.