Application domain specific embedded FPGAs for SoC platforms
Thomas Noll · 2004
Summary form only given. With the continuous progress of CMOS technology, the integration of complex systems with a huge computational power on a silicon single die becomes feasible. Aside from the well known advantages of system-on-chip (SoC) devices, their exploding complexity presents SoC designers with serious issues. In order to overcome the inevitable cost problems, the concept of SoC platforms, suited to match the requirements of different applications in a specific domain, is applied, allowing costs to be shared among a high volume of fabricated devices. This platform approach, as well as other aspects, requires a high degree of flexibility to be provided on future SoCs. SW-programmable kernels offer high flexibility, but poor performance. High performance blocks dedicated to standard functionalities feature better power and area efficiency but no flexibility. An alternative implementation is the use of re-configurable embedded FPGA (eFPGA) blocks which allow an attractive compromise between flexibility and efficiency. Approaches for finding the optimized mixture of architecture blocks in SoC platforms, optimization concepts exploiting characteristics inherent to arithmetic (like interactivity and locality) as well as the feasible optimization potential of application domain specific eFPGAs are presented.