Low Power Reduced Instruction Set Architecture Using Clock Gating Technique
Maddu Kamaraju, G. Chinavenkateswararao · International Journal of VLSI Design & Communication Systems · 2013
Today, all the portable device's in electronics needs to be realized with low power architectures because of power consumption is a main consideration along with other performance parameters.Low power consumption helps to reduce heat dissipation, increases battery life and also reliability.In this paper a 16bit Reduced Instruction set Architecture (RISA) presented.This architecture can handle multiple interrupts and performing serial communication effectively.It can supported RISC (Reduced Instruction Set Computer) concepts.A popular technique of Clock gating is applied to the proposed architecture and then reduces the power.This entire architecture captured using VerilogHDL and implemented on FPGA using Xilinx tools.