HARDWARE IMPLEMENTATION OF AES ALGORITHM
Marko Mali, Franc Novak, Anton Biasizzo · 2005
The paper presents a hardware implementation of the AES algorithm developed for an external data storage unit in a dependable application. The algorithm was implemented in FPGA using the development board Celoxica RC1000 and development suite Celoxica DK. The purpose of this prototype version was to test the correctness of the implemented algorithm and to gain experience in optimisation of algorithm structure for the prospective embedded implementation in the target application. K e y w o r d s: AES algorithm, hardware implementation 1