Cost-effective processor design with an application to fast fourier transform computers.
Arvid G. Larson · Defense Technical Information Center (DTIC) · 1973
A cost-effective processor design is one that attains a high ratio of processing performance to processor component cost. This research investigates the circuit design of a processor or processing subsystems for costeffective implementation of a particular computation algorithm. The logic designs considered in this work use circuit components for which the delay and cost of functional building blocks or gates are known. A logic design technique is described that permits processing performance and cost comparisons among alternative computation algorithms and circuit technologies. It also provides a basis for contrasting alternative processor architectures, including both pipelined and parallel computing structures. (Modified author abstract)