Asynchronous protocol for data exchange between processors in RSFQ multiuser detector
Elena V. Tolkacheva, Henrik Engseth, Irina Kataeva, K. Yu. Platov, Anna Kidiyarova-Shevchenko · Chalmers Publication Library (Chalmers University of Technology) · 2003
This paper describes asynchronous protocol that has been proposed for communication between processors of RSFQ Successive Interference Canceller (RSFQ SIC). The protocol is based on request-acknowledgement scheme between output accumulator and input data buffers of the processors. The experimental scheme of the protocol has been simulated and designed. Simulated frequency is 11 GHz for 1 kA/cm^2 HYPRES process with global bias current supply margins -27%/+29%, inductance margins -38%/+38%. Scheme for experimental testing of the protocol was developed, several blocks were designed and tested at low speed (30 kHz).