Synchronizing Two FPGA’s for a reliable communication
Mercy Subaraman · IOSR Journal of Engineering · 2013
In the field of electronic design, SOC technology is recently becoming increasingly mature.This situation results in the requirement of realizing the whole system function in a single or a very few chips.Universal Asynchronous Receiver Transmitter (UART) is a kind of serial communication protocol.In parallel communication the cost as well as complexity of the system increases due to simultaneous transmission of data bits on multiple wires.Serial communication alleviates this drawback of parallel communication and emerges effectively in many applications for long distance communication as it reduces the signal distortion because of its simple structure.In particular, it focuses on their effective data transmission rates and ratios.The usage of FPGA systems in real time domain is a very fruitful proposition as the FPGA devices are coming with processing cores for Real Time data processing.As FPGA performance and capabilities have increased substantially in recent years, FPGA-based designs are employed to implement complex functions and designs.To make this possible we have to establish a real time data communication between the FPGA devices.UART includes three kernel modules which are the baud rate generator, receiver and transmitter.The UART implemented with VHDL language can be integrated into the FPGA to achieve Compact, stable and reliable data transmission which will be an essential component to build a complex data acquisition system.Hence, in this Project We have established a real time data communication between scrambling algorithms running on Two FPGA's with the help of a reconfigurable baudrate generator.This enables the speech signals to be communicated effectively.