Square Root Generator for Galois Field in Multiple-Valued Logic
Nabil Abu-Khader, Pepe Siy, Nesreen Al-Nashashibi · Recent Patents on Electrical Engineering · 2011
In this paper, we present two pipelined square root circuits for Galois field in Multiple-Valued Logic (MVL). We use composite Galois fields in a MVL approach to generate the required square root value in the field. The fact that less literals are used in our approach speeds up the calculation operation. The MVL approach of calculating the square root in a composite Galois field is novel. In this review important patents are also discussed. Keywords: Galois Field, MVL, Square Root, Error-correcting codes, Multiple-valued logic, Systolic Product-Sum Circuit, Cryptography system, Galois field divider