Placement Time Optimization of Chip Mounter by GA Adopting Viral Infection.
Takashi MIYAJIMA, Tatsuo Koitabashi · TRANSACTIONS OF THE JAPAN SOCIETY OF MECHANICAL ENGINEERS Series C · 2000
This paper presents a placement time optimization method of chip mounter. Placement time varies for chip mouters where a PCB(printed circuit board)and tape feeder position are fixed, with parts placement sequence and tape feeder arrangement with same hardware performance. The problem definition is how to get the optimal parts placement sequence and tape feeder arrangement for minimum placement time about multi-head chip mounter. We propose a method using GA based on the Virus Theory of Evolution. In this approach, viruses are regarded as partial combinations and applied to genetic operations to improve the quality of solutions. The experimental results support efficiency of this method in comparison with a method using simple GA.