Recent trends and considerations for high speed data in chips and system interconnects
Ignacio Llamas‐Garro, Joan Bas, Josep M. Fàbrega, Michela Svaluto Moreolo, Benjamin Carrión Schäfer, Reydezel Torres‐Torres, M. R. T. de Oliveira, M. T. de Melo, Jung-Mu Kim, Dejan Vukobratović · 2015
This paper discusses key issues related to the design of large processing volume chip architectures and high speed system interconnects. Design methodologies and techniques are discussed, where recent trends and considerations are highlighted.