Using an Intermediate Representation to Map Workloads on Heterogeneous Parallel Systems
Nicolas Benoit, Stéphane Louise · 2016
Current trends in computer architecture show that we are aiming toward more cores and even more heterogeneity. As an extensive knowledge of processor's internals cannot be a prerequisite to their programming and for the sake of portability, these systems necessitate the compilation flow to evolve and cope with heterogeneity issues. This is even more so true for embedded systems. In this paper, we show how to start from a specific Intermediate Representation (IR) to explore the configuration space of program-part mappings on heterogeneous targets thank to a GCC pluggin. Then we define a simple execution model with predictable performance and use execution time from generated elementary kernels to predict the performance of the whole application. We show a very good accuracy of this framework to predict real world performance on experimental results and how we can use it to choose the best parallel configuration.