A deductive fault diagnosis method for resolving cases of test invalidation in multiprocessor systems
Athanasios T. Karygiannis · 1997
A new deductive fault-diagnosis method that resolves cases of test invalidation in multiprocessor systems is presented. The necessary conditions for PMC-based one-step t-fault diagnosability methods require that there are at least $2t + 1$ processor nodes, and that each node is diagnosed by at least t other processor nodes. The Deductive Fault-Diagnosis (DFD) method shown in the present research shows the conditions under which these requirements can be eliminated. The DFD method assumes that for each processor PE$\rm\sb{i}$ within a multiprocessor system M, the number of faults in $I\sb{i}\leq1$ and the number of faults in $\it I\sbsp{i}{-1}\geq0$. The set $I\sb{i}$ consists of the faults in processor PE$\rm\sb{i}$ that affect the outcome of tests performed on an adjacent processor PE$\rm\sb{j}$. The set $\it I\sbsp{i}{-1}$ is the set of faults in processor PE$\rm\sb{i}$ that have no effect on the tests of processor PE$\rm\sb{j}$. The results are achieved by performing further analysis on the failures reported by both faulty and fault-free processors and by developing a Reverse Fault Dictionary (RFD) to help resolve cases of test invalidation. The RFD tabulates the effects of two forms of test invalidation: fault misdirecting and fault masking. Fault misdirecting occurs when a fault $f\sb{d}$ in processor PE$\rm\sb{i}$ causes the test of a fault-free adjacent processor PE$\rm\sb{j}$ to incorrectly report the presence of a fault $f\sb{n}$ in processor PE$\rm\sb{j}$. Fault masking occurs when a fault $f\sb{m}$ in processor PE$\rm\sb{i}$ conceals the presence of a fault $f\sb{n}$ in an adjacent processor PE$\rm\sb{j}$ causing processor PE$\rm\sb{i}$ to incorrectly report the absence of fault $f\sb{n}$ in processor PE$\rm\sb{j}$. The diagnostic capabilities of this method are not limited by the number of faulty processors, but by the test invalidation relationships of faults within adjacent processors.