Measuring Code Optimization Impact on Voltage Noise
Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, David M. Brooks, Vijay Janapa Reddi · Digital Access to Scholarship at Harvard (DASH) (Harvard University) · 2013
Abstract—In this paper, we characterize the impact of compiler optimizations on voltage noise. While intuition may suggest that the better processor utilization ensured by optimizing compilers results in a small amount of voltage variation, our measurements on a Intel R © CoreTM2 Duo processor show the opposite – the majority of SPEC 2006 benchmarks exhibit more voltage droops when aggressively optimized. We show that this increase in noise could be sufficient for a net performance decrease in a typical-case, resilient design. I.