Memory access control for multiprocessor system using microcode bits to transfer memory control on idle cycles
J. L. Temple · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 1982
The author describes a multiprocessing system in which two processors a and b share main memory and the control of memory is transferred from one processor (e.g., a) to the other processor (b) and when b has previously signaled a request for memory access and when microcode in a signifies that a sequence of memory accesses by a has been completed.