Formal Security Verification of Third Party Intellectual Property Cores for Information Leakage
Jeyavijayan Rajendran, Arunshankar Muruga Dhandayuthapany, Vivekananda M. Vedula, Ramesh Karri · 2016
Globalization of the system-on-chip (SoC) design flow has created opportunities for rogue intellectual property (IP) vendors to insert malicious circuits (a.k.a. hardware Trojans) into their IPs. We propose to formally verify third party IPs (3PIPs) for unauthorized information leakage. We validate our technique using Trojan benchmarks from the Trust-Hub.