Yet Another Waiting Mechanism Based on Conflict Prediction for Hardware Transactional Memory
Mashita Keisuke, Sho Miyake, Ryohei Yamada, Tomoaki Tsumura · 2015
Transactional Memory (TM) has been proposed and studied for lock-free synchronization. On TMs, transactions are executed speculatively in parallel as long as they do not encounter any conflicts on shared variables. On general HTMs: hardware implementations of TM, transactions which have conflicted once each other will conflict repeatedly if they will be executed again in parallel, and the performance of HTM will be declined. To address this problem, in this paper, we propose a conflict prediction to avoid conflicts in advance based on historical data of conflicts. The result of the experiment shows that the execution time of HTM is reduced 63.5% in maximum, and 19.6% in average with 16 threads.