HP300 Architecture
A.B. Bergh, K.C.Y. Mei · 2005
The HP300 is a low cost computer system whose CPU is a stack processor with separate non-modifiable segmented code spaces plus additional virtual memory segmented data spaces. The stack is used for program control, paramenter passing, local storage and expression evaluation. The data segments provide space for global data and additional array space. Capabilities provided by this structure include relocatability, reentrancy, recursion, code sharing, program protection, convenient dynamic storage allocation, and a logical virtual memory structure for code and data that provides a large machine address space. The CPU is a microprogram controlled processor utilizing three costom-designed large-scale integrated (LSI) circuits, 6K 32-bit words of read-only memory control store and some periphera logic to communicate through the intermodule bus to memory and I/0. The LSI circuits are made with HP's complementary metal-oxide-semiconductor/ silicon-on sapphire (CMOS/SOS) process. The CPU architecture and hardware design are described in this paper.