Efficient implementation of BCH decoders on GPU for flash memory devices using iBMA
Arul K. Subbiah, Tokunbo Ogunfunmi · 2016
Recent development and popularity of Flash Memory requires efficient error correction technique on its eco system like gaming and mobile platforms. In this paper, we have addressed an efficient method to decode and correct errors using the parallel computing technique offered by Graphical Processing Unit (GPU). This decoder employs the inversion-less Berleykamp-Massey algorithm (iBMA), and Chein search algorithm to decode the BCH (Bose-Chaudhuri-Hocquenghem) codes. We have devised an engine, on a GPU, that decodes BCH (n=8192, k=4096, t=4) code, and the results have shown that the latency of the decoder is less than the typical read latency of the flash memory device. Further, a comparative analysis of the same engine for different block size and error bits.